Computers - EdexcelThe Von Neumann stored program concept

Von Neumann architecture is the design upon which many general purpose computers are based. This architecture uses the stored program concept.The key elements of Von Neumann architecture are:

• data and instructions are both stored as binary digits
• data and instructions are both stored together in the same RAM
• instructions are fetched from memory one at a time and in order - serially
• the processor decodes and executes an instruction, before cycling around to fetch the next instruction
• the cycle continues until no more instructions are available

A processor based on Von Neumann architecture has five special registers which it uses for processing:

• program counter - holds the memory address of the next instruction to be fetched from main memory
• memory address register (MAR) - holds the address of the current instruction that is to be fetched from memory, or the address in memory to which data is to be transferred
• memory data register (MDR) - holds the contents found at the address held in the MAR, or data which is to be transferred to main memory
• current instruction register (CIR) - holds the instruction that is currently being decoded and executed
• accumulator (ACC) - holds the results of processing

The registers and key elements of the Von Neumann architecture all play a part in how an instruction is processed in the fetch-decode-execute cycle.

The fetch-decode-execute cycle

The fetch-decode-execute cycle is followed by a processor to process an instruction. The cycle consists of several steps:

1. The memory address held in the program counter is copied into the MAR.
2. The address in the program counter is then incremented - or increased - by one. The program counter now holds the address of the next instruction to be fetched.
3. The processor sends a signal containing the address of the instruction to be fetched along the address bus to the computer’s memory.
4. The instruction held in that memory address is sent along the data bus to the MDR.
5. The instruction held in the MDR is copied into the CIR.
6. The instruction held in the CIR is decoded and then executed. The results of processing are stored in the ACC.
7. The cycle then returns to step one.

Depending on the type of instruction, additional steps may be taken:

• If the instruction is to transfer data held in the ACC back to RAM, the intended memory address is copied into the MAR. The data to be transferred is copied into the MDR and then transferred to the specified address using the address bus and data bus.
• The executed instruction may require the program to jump to a different place in the program. In this case, the memory address of the new next instruction to be fetched is copied into the program counter. The process then restarts at step one.